AMD prepares Ryzen 7 9850X3D and Ryzen 9 9950X3D2 CPUs with higher clocks and full 3D V-Cache on all cores. See what improvements are coming.
AMD prepares Ryzen 7 9850X3D and Ryzen 9 9950X3D2 CPUs with higher clocks and full 3D V-Cache on all cores. See what improvements are coming.
Two V-Cache CCDs just don’t make sense for consumer use-cases is the point here.
Because of the latency topology you’d only see a benefit if both CCDs were running independent programs that are more strictly sensitive to latency than compute throughput. That’s a very niche subset of uses, and like I said, ideal for a GSP deployment. This should be a product, but in the EPYC 4005 family.
Otherwise, you’re better off with some sort of heterogeneous topology, one can imagine an 8 core V-Cache CCD paired with a 16 c-core CCD design (this is very roughly what Intel is pursuing with upcoming products) which offers compelling utility even in the consumer space.